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Splyce turns unpredictable sparse control flow into a more predictable data stream, exposing SIMD and instruction-level parallelism. Sometimes optimization is about restructuring work so hardware can see the parallelism already there. arxiv.org/abs/2609.19410 #Compilers #Performance

arxiv.orgSplyce: SIMD Vectorization of Sparse CoiterationSparse tensor contractions are bottlenecked by sparse-sparse coiteration loops that resist standard loop vectorization. We present Splyce, an auto-vectorization framework in MLIR that overcomes this t...

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